1. Field of the Invention
This invention relates to signal processing.
2. Background Information
In an oversampling data receiver system, a digital phase-locked loop (DPLL) may be applied to the oversampled signal to select the sample that best represents each oversampled bit. In a three-times oversampling system, for example, a DPLL may be used in selecting one sample out of each consecutive series of three samples. The DPLL indicates the proper sample by determining the phase relationship between the data and the clock.
It is desirable to improve the tracking behavior of such a system. It is also desirable to maintain noise rejection capability.